Semiconductor wafers are commonly used in the production of integrated circuit (IC) chips on which circuitry are printed. The circuitry is first printed in miniaturized form onto surfaces of the wafers. The wafers are then broken into circuit chips. This miniaturized circuitry requires that front and back surfaces of each wafer be extremely flat and parallel to ensure that the circuitry can be properly printed over the entire surface of the wafer. To accomplish this, grinding and polishing processes are commonly used to improve flatness and parallelism of the front and back surfaces of the wafer after the wafer is cut from an ingot. A particularly good finish is required when polishing the wafer in preparation for printing the miniaturized circuits on the wafer by an electron beam-lithographic or photolithographic process (hereinafter “lithography”). The wafer surface on which the miniaturized circuits are to be printed must be flat. Similarly, flatness and finish are also important for solar applications.
Polishing machines typically include a circular or annular polishing pad mounted on a turntable or platen for driven rotation about a vertical axis passing through the center of the pad and a mechanism for holding the wafer and forcing it into the polishing pad. The wafer is typically mounted to the polishing head using for example, liquid surface tension or a vacuum/suction. A polishing slurry, typically including chemical polishing agents and abrasive particles, is applied to the pad for greater polishing interaction between the polishing pad and the surface of the wafer. This type of polishing operation is typically referred to as chemical-mechanical polishing (CMP).
During operation, the pad is rotated and the wafer is brought into contact with and forced against the pad by the polishing head. As the pad wears, e.g., after a few hundred wafers, wafer flatness parameters degrade because the pad is no longer flat, but instead has a worn annular band forming a depression along the polishing surface of the pad. Such pad wear impacts wafer flatness, and may cause “dishing” or “doming” or a combination thereof resulting in a “w-shape”.
Some known systems adjust wafer flatness during single-side polishing to change the vacuum used to hold the block to which the wafer is attached in order to introduce a variation of the curvature of the block and the attached wafer. An increase of the vacuum will result in a concave deformation of the block and of the wafer, the wafer edge will be polished more than the wafer center, resulting in a more convex (less concave) wafer. On the contrary, a reduction of the vacuum will result in a more concave (less convex) wafer. This approach assumes that the current wafer shape (concave or convex) produced by the polisher is known. In general, however, the wafer shape is measured after polishing, so that the current wafer shape knowledge always has a delay, resulting in an inaccurate feedback to the vacuum adjustment system.
This Background section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.